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R-Trees -- Adapting out-of-core techniques to modern memory architectures
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SKU GDC10-10437
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Description
R-Trees -- Adapting out-of-core techniques to modern memory architectures
Speaker: Sebastian Sylvan (Principal Software Engineer, Rare Ltd.)
Date/Time: Saturday (March 13, 2010) 11:05am 11:30am
Location (room): Room 132, North Hall
Track: Programming
Format: 25-minute Lecture
Experience Level: All

Session Description
Code running on modern in-order CPUs pay a hefty cost for cache misses. This leads to major performance problem for pointer-heavy data structures, such as spatial hierarchies. This problem is similar to the problems encountered by people doing out-of-core processing for the last several decades. They needed to minimize disk seeks, we need to minimize memory fetches. An R-tree is a BV-hierarchy based on large fixed-size blocks, commonly used in disk based spatial processing. This talk shows how to adapt them for in-memory use, reaping major benefits with respect to cache behaviour, as well as SIMD processing, and more!

Intended Audience
Anyone interested in spatial indexing structures for graphics, physics, gameplay or any other purpose, or anyone interested in cache-friendly data structures in general, as the concepts discussed are not entirely R-tree-specific. Some experience with writing performance code is preferable.

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